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Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama, "Implementation of a Partially Reconfigurable Multi-Context FPGA Based on Asynchronous Architecture", IEICE Transactions on Electronics, Vol.E92-C No.4, pp.539-549, 2009-04-01
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyama, "Optimal Periodic Memory Allocation for Image Processing With Multiple Windows", IEEE Transactions onf Very Large Scale Integration Systems, Vol17 No3, 403-416, 2009-01-01
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama, "Evaluation of Interconnect-Complexity-Aware Low-Power VLSI Design Using Multiple Supply and Threshold Voltages", IEICE Transactions on Electronics, Vol.E91-A No.12, pp.3596-3606, 2008-12-01
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyama, "Memory Allocation for Multi-Resolution Image Processing", IEICE Transaction on Information and Systems, E91-D, No.10, 2386-2397, 2008-10-01
Masanori Hariyama, Shota Ishihara, Michitaka Kameyama, "Evaluation of a Field-Programmable VLSI Based on an Asynchronous Bit-Serial Architecture", IEICE Transactions on Electronics, Vol.E91-C,No.9, pp.1419-1426, 2008-09-01

Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama, "Architecture of a Low-Power FPGA Based on Self-Adaptive Voltage Control", Proc. International SoC Design Conference (ISOCC), 274-277, 2009-11-24
Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama, "An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters", Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA), 145-150, 2009-07-14
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama, "Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays", International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2009), pp.291-294, 2009-07-13
Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama, "A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic", Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA), 271-274, 2009-07-13
Masanori Hariyama, Keita Tanji, Michitaka Kameyama, "FPGA Implementation of a High-Speed Stereo Matching Processor Based on Recursive Computation", International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2009), 263-266, 2009-07-13

石原翔太, 夏徴帆, 張山昌論, 亀山充隆, "自律適応電源電圧制御に基づく低消費電力FPGAの構成", 電子情報通信学会技術研究報告（信学技報）, vol. 109, no. 395, pp. 95-99, 2010-01-27
石原翔太, 小松与志也, 張山昌論, 亀山充隆, "LEDR/4相2線プロトコルコンバータを用いた非同期FPGAの構成", 電子情報通信学会技術研究報告（信学技報）, vol. 109, no. 198, pp. 103-108, 2009-09-18
丹治慶太, 張山昌論, 亀山充隆, "再帰的計算に基づく高速ステレオマッチングプロセッサのFPGA実現", 計測自動制御学会東北支部 45周年記念学術講演会(SICE), 2009-09-07
奥村大輔, ハシタムトゥマラウィシディスーリヤ, 張山昌論, 亀山充隆, "データ転送時間を考慮したマルチメディア応用ヘテロジニアスマルチコアアーキテクチャのためのマッピング", 計測自動制御学会東北支部 45周年記念学術講演会(SICE), 1310, 77-80, 2009-09-07
石原翔太, 井戸端紀彰, 小松与志也, 張山昌論, 亀山充隆, "低消費電力非同期フィールドプログラマブルVLSIの開発", LSIとシステムのワークショップ, pp. 280-282, 2009-05-19